1. Field of the Invention
This invention relates to the selective deposition of polysilicon over a single crystal silicon substrate. More particularly, the invention relates to a process which permits selective formation of poly crystalline silicon over exposed portions of a single crystal silicon substrate by interposing a thin layer of lattice mismatched material between the single crystal silicon material and the polycrystalline silicon.
2. Description of the Related Art
The continued scaling down of the dimensions of integrated circuit structures places much more stringent requirements on both the lateral and vertical dimensions of the active devices, such as MOS and bipolar devices, which form a part of such integrated circuit structures.
Thus, for example, the resulting shrinkage of an MOS transistor, resulting in a smaller (shorter) channel results in a need for smaller (shallower) source/drain junctions with the channel region, since lateral diffusion of the source/drain dopants beneath the gate electrode and into the channel region (resulting in an undesirable shortening of the channel) increases with the depth of the source/drain regions. If the gate and underlying channel have a length of 0.25 micrometers .mu.m), the required depth of the source/drain junctions with the channel should be less than about 1000 Angstroms (.ANG.).
However, both the fabrication of such shallow depth source/drains regions and the formation of contacts to such regions are difficult. Since ion-implantation is the preferred method of forming the source/drain regions, reduction of the depth of the desired source/drain region results in increased problems of control of the ion-implantation, with channeling problems occurring as well as increased difficulties in providing sufficient annealing to remove damage to the substrate caused by such implantation without excessive diffusion. For shallow junctions, such implantation damage will interact electrically to produce undesirable leakage currents.
The formation of contacts to such shallow source/drain regions using conventional silicide formation over the source/drain regions is also rendered more difficult as the depth of the source/drain regions shrink. The silicide thickness should be limited to less than half the initial depth of the underlying source/drain regions to maintain desirable electrical performance by the source/drain regions. Thus, for source/drain regions having a depth of 1000 .ANG. or less, the silicide thickness should be less than 500 .ANG., i.e., about 400 .ANG.. Formation of a titanium silicide contact of this thickness over such a shallow source/drain region would require an initial deposition of only about 175 .ANG. of titanium, a deposition thickness which is difficult to control, and such a thin titanium silicide contact does not result in a sufficiently low sheet resistance.
To overcome such problems of contact formation to such shallow source/drain regions, an alternate which has been proposed is to elevate the source/drain regions above the substrate surface by the selective deposition of further material, e.g., silicon, over the silicon substrate. By selectively depositing a sacrificial layer over the source/drain regions, one can produce an effectively thicker source/drain region (vertically) while maintaining an electrically shallow lateral junction with the adjacent channel within the original substrate. That is, the deposited region above the original silicon substrate surface will not impact the electrical junction depth, but instead only serve to make contact to the source/drain junctions easier.
In a simple application of such an elevated source/drain region, silicon may be selectively deposited (i.e., deposited only over the silicon and not the adjacent silicon oxide insulating surfaces) after formation (implantation) of the source/drain regions and be used only as a sacrificial layer during self-aligned silicide formation, in which case such a deposition allows thicker silicides to be formed on electrically shallow junctions. At the same time, if the additional deposited silicon is undoped, such silicide formation will result in equal thicknesses formed over either N.sup.+ -P and P.sup.+ -N junctions by eliminating interactions between dopants, such as arsenic, with the silicide. An additional advantage of an elevated source/drain MOS structure is a potential increase in packing density, because peripheral contacts can be allowed. Since the selectively deposited layer will overlap the field edge, contacts can be placed directly on the elevated source/drain regions without the requirement for excessive contact enclosure and without causing junction leakage as can happen in non-elevated source/drain regions when the contact at the field edge spikes through the source/drain junction under the field edge causing leakage.
Such a selectively deposited layer of silicon may also be used as a solid diffusion source to form the source/drain regions. First the layer is selectively deposited on the source/drain regions prior to source/drain dopant introduction (implantation). The deposited layer is then doped by ion implantation and the dopants implanted into the additional or sacrificial layer are subsequently driven into the underlying silicon substrate by thermal annealing, resulting in the desired very shallow source/drain regions in the substrate and resultant very shallow lateral electrical junctions with the channel beneath the gate electrode. By carefully choosing the thickness of the deposited layer and the implant energy, the implant can be completely confined within the selectively deposited layer to avoid substrate damage. Because of the added thickness of this layer, conventional implantation techniques may be used, allowing the continued used of existing equipment and process parameters.
However, when the additional layer of silicon is used as a solid diffusion source, as well as a sacrificial layer, the selectively deposited layer must exhibit certain properties. In order to produce shallow, abrupt junctions, dopant diffusivities in the selectively deposited layer must be high such that dopants will rapidly diffuse vertically through the layer to the original silicon surface. At this point, diffusion in the substrate proceeds normally with no interactions between the diffusing species and no damage associated with the implant process (since the shallow implant is limited the selectively formed layer over the substrate and does not penetrate into the substrate).
Formation of such a sacrificial silicon layer by epitaxial growth of silicon would be advantageous because of the selectively of such epitaxial growth over only the exposed portions of the silicon surface, and not over adjacent silicon oxide surfaces. This is shown in prior art FIG. 1 wherein a silicon substrate 2, having field oxide portions 6, is shown having surface areas 10 beneath which source and drain regions will be subsequently formed in substrate 2. A gate electrode 12 is shown formed over gate oxide 14. Oxide spacers 16 are shown formed on the sidewall of gate electrode 12 to insulate gate electrode 12 from the source/drain electrode contacts which will be subsequently formed over surface areas 10. As shown in FIG. 1, the native silicon oxide which would normally be present over surface areas 10 has been previously removed by an HCl etch, and epitaxial silicon layer 20 has been selectively formed over surfaces areas 10.
However, as stated above, such an epitaxial growth of silicon over surface areas 10 requires the prior removal of the native oxide over the silicon substrate surface by an etching process which, if not carefully controlled, may result in the concurrent removal of, or damage to, the oxide spacers on the sidewalls of the silicon gate electrode, risking possible shorts between the gate electrode and the source/drain electrodes. Furthermore, such an epitaxial silicon layer would have the same properties as the underlying single crystal silicon substrate, including the same slow diffusion properties, making control of the diffusion of dopants into the source/drain regions harder to control. That is, lateral diffusion of the dopant is still a problem because of the slow rate of diffusion of the dopant through the epitaxial silicon into the substrate.
On the other hand, while the rate of diffusivity of polysilicon would be much greater than epitaxial silicon (as much as 100 times greater), polysilicon would deposit nonselectively over both the silicon substrate and over adjacent silicon oxide (e.g., field oxide) surfaces as well. This is shown in FIG. 2, wherein native oxide portions 18 are shown overlying surface areas 10, and a layer 22 of polysilicon is shown nonselectively deposited not only on native oxide portions 18 overlying surface areas 10, but also over the surfaces of field oxide portions 6 as well.
To obtain selectivity in a silicon deposition would require removal of the native oxide overlying the silicon substrate, with the concomitant problems already described, and the resulting silicon layer deposited would then be single crystal (epitaxial) silicon rather than polycrystalline, thus defeating the attempt to increase the diffusivity rate of the dopant through the silicon layer.
It has been proposed to form such elevated source/drain regions by deposition of a layer of a silicon/germanium (SiGe) alloy. Such SiGe deposition would provide high selectivity in deposition on the underlying silicon in preference to silicon oxide. Furthermore, the large lattice mismatch between the SiGe alloy and the silicon substrate would result in the deposition of a polycrystalline layer which provides the defects and grain boundaries which act as pipelines to more rapidly introduce dopants to the underlying silicon substrate than would single crystal material such as the previously described epitaxial silicon material, resulting in a dopant diffusivity of approximately 10 times that of single crystal silicon. This is shown in FIG. 3 wherein a layer 24 of a SiGe alloy has been selectively formed over surfaces areas 10 of silicon substrate 2.
However, polycrystalline silicon exhibits a dopant diffusivity of approximately 100 times that of single crystal silicon, i.e., much greater than the aforesaid SiGe alloy. Hence, polycrystalline silicon would be the material of choice for the formation of such raised source/drain regions, were it not for the inability to deposit polysilicon selectively over only the silicon substrate and not on the adjacent silicon oxide surfaces as well.